At the IEEE International Electron Devices Meeting being held this week, Leuven, Belgium-based nanotechnology research center IMEC is reporting significant progress in improving the performance of ...
LONDON — Belgian research organization IMEC has presented on a scheme to use fully-silicided (FUSI) nickel-silicide metal gates with high-k dielectric CMOS transistors at the International Electron ...
IMEC, the Belgium-based nanotechnology research center, announced at this week's VLSI Symposium that it has improved the performance of its planar CMOS using hafnium-based, high-k dielectrics and ...
Taking the final step in the quest for dual metal gates, SEMATECH engineers have demonstrated high-k/metal gate stacks that were used to build high-performance nMOS and pMOS transistors in a CMOS ...
Gordon Moore's prediction made over 40 years ago, that the number of transistors in an integrated circuit would double roughly every 24 months, continues to be the guiding principle of the ...
28nm Super Low Power is the low power CMOS offering delivered on a bulk silicon substrate for mobile consumer and digital consumer applications. The 28nm process technology is slated to become the ...
In logic devices such as finFETs (field-effect transistors), metal gate parasitic capacitance can negatively impact electrical performance. One way to reduce this parasitic capacitance is to optimize ...
TechInsights reverse engineers chips to understand how they are made and in some cases why certain structures are the way they are. This article examines two electrically blown fuse structures (eFuse) ...
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