Le Lézard

MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. , ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware ...
Nanowerk

Stacked memristor arrays compute Euclidean distance in memory to accelerate self-organizing maps

A novel stacked memristor architecture performs Euclidean distance calculations directly within memory, enabling ...

Nvidia leans on emulation to squeeze more HPC oomph from AI chips in race against AMD

AMD researchers argue that, while algorithms like the Ozaki scheme merit investigation, they're still not ready for prime ...
EDN

Power Tips #149: Boosting EV charger efficiency and density with single-stage matrix converters

Understanding the benefits of matrix converters for EV chargers and a comparison of different matrix converter topologies.
IEEE

Performance and Power Characteristics of Matrix Multiplication Algorithms on Multicore and Shared Memory Machines

Abstract: For many scientific applications, dense matrix multiplication is one of the most important and computation intensive linear algebra operations. An efficient matrix multiplication on high ...
IEEE

HyMM: A Hybrid Sparse-Dense Matrix Multiplication Accelerator for GCNs

Abstract: Graph convolutional networks (GCNs) are emerging neural network models designed to process graph-structured data. Due to massively parallel computations using irregular data structures by ...
GitHub

Implications of Language Choice for Algorithmic Efficiency in Low-Power Computing

This repository accompanies the research paper "Implications of Language Choice for Algorithmic Efficiency in Low-Power Computing." The study investigates how the choice of programming ...